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Company Registration Information

Die Doulos GmbH ist eine hundertprozentige Tochtergesellschaft der Doulos Ltd.

Doulos Ltd ist ein Privatunternehmen, das im Vereinigten Königreich (UK) eingetragen ist. Neben seinem Hauptsitz in England unterhält Doulos Niederlassungen bzw. Betriebe in anderen Ländern wie Deutschland und den USA.

Doulos Ltd ist in England und Wales unter der Firmennummer 03723454 eingetragen. Der eingetragene Firmensitz ist: 4 Brackley Close, Bournemouth International Airport, Christchurch, BH23 6SE, UK.

Geschäftsführer: Thomas Winkler

Firmensitz Munich
Doulos GmbH
Konrad-Zuse-Platz 8

81829 München

Deutschland/Germany

Court Registergericht München: HRB 259317

MwSt Nummer: DE 226 222 648
Steuernummer: 25/279/02493

Upcoming Live Webinars

AXI based Design & Verification

Friday November 07 2025

1 hour session (All Time Zones)

This webinar will cover the basics of on-chip buses, key terminologies and why we need them, before going deeper into AMBA : AXI bus architecture.

Beginners' Guide to Using AI for Hardware Engineers

Friday November 14 2025

1 hour session (All Time Zones)

This webinar will examine how AI can help do a better job of engineering. Learn how to start integrating AI into your projects with real examples of AI used in hardware design and verification.

C/C++ Memory Management: Design and Debugging

Friday November 21 2025

1 hour session (All Time Zones)

This webinar explores best practices for avoiding memory issues in design and debugging memory usage issues in C and C++.

Getting Started with Embedded Linux Security

Tuesday November 25 2025

1 hour session (All Time Zones)

This webinar will examine some of the main features and tools which can be used to make your embedded Linux system more secure.

Rust Insights: Embedded Rust Toolchain

Friday December 05 2025

1 hour session (All Time Zones)

This webinar introduces the essential components of an Embedded Rust toolchain, from the minimal setup through to interactive debugging and logging.

Creating UVM Components from MATLAB Models and SystemVerilog-DPI

Wednesday December 10 2025

60 minute session (All Time Zones)

This webinar will explore the effects of routing vias and connector plated through holes on very high data rate signals using actual test results from as-built PCBs.