October Workshop - Designing with the Versal Adaptive SoC: Hardware Debug ONLINE

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October Workshop - Designing with the Versal Adaptive SoC: Hardware Debug ONLINE

October 2025|Event

Doulos is pleased to announce this free online workshop in collaboration with AMD! This practical and technical training event focuses on hardware debug techniques for the AMD Versal™ Adaptive SoC.

Are you ready to explore the full debug capabilities of AMD’s Versal architecture? This workshop will guide you through the essential tools, flows, and APIs needed to analyse and debug your designs efficiently, from JTAG to high-speed debug with HSDP.

The emphasis of this workshop is on:

Understanding the Versal tool flows and how to configure the device for debugging
Exploring debug interfaces like TAP, DAP, and SmartLynq+
Utilizing key debug IPs including AXI Debug Hub, AXIS ILA, and AXIS VIO
Debugging hard blocks such as GTs, DDRMC, PCIe®, and AI Engines
Using ChipScoPy APIs for Python-based hardware debug and automation
Applying system integration and validation best practices for performance tuning

This is an interactive workshop - participants are encouraged to ask questions and engage directly with the Doulos expert throughout.

With thanks to AMD for sponsoring this event, attendance is FREE OF CHARGE.

SCHEDULED FOR OCTOBER 23 & 24 2025 (AVAILABLE IN EURASIA & AMERICAS):

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Designing with the Versal Adaptive SoC: Hardware Debug ONLINE

Find a Training Course