Global training solutions for engineers creating the world's electronics

Doulos Gold Sponsor for Verification Futures Conference UK

June 2025|Event

Doulos is proud to support the Verification Futures Conference UK 2025 on Tuesday, July 1st, in Reading (UK) and online. Register Now »

This FREE one-day conference provides a unique blend of presentations, exhibitions, training and industry networking sessions dedicated to discussing the challenges faced in hardware and software verification. 

Join Doulos for two insightful presentations and an exclusive workshop: 

Navigating the Verification Maze
Doulos Senior Member Technical Staff, Matthew Taylor
There are multiple languages and techniques available for verifying a digital logic FPGA or IC. You could just write a basic testbench in VHDL or Verilog/SystemVerilog. You could write a sophisticated testbench in either language using Transaction Level Verification (TLV). You could use Constrained Random Verification. You could even adopt one of these two completely different approaches: Formal Verification and/or the Portable Stimulus Standard (PSS). It's a maze. What best to do? Which path to take? This presentation helps you navigate this Verification Maze by introducing these languages and techniques, what they are, what they are for, and how to choose between them. Read full description »

Class-based Design Verification with Python cocotb
Doulos Certified Training Instructor, Matt Bridle 
The Python-based cocotb framework is an attractive option for verification engineers who would prefer not to learn a whole new verification language or a heavyweight verification methodology. But one can be put off by the dynamic nature of Python and its history as a scripting language, for fear of creating a testbench environment which is poorly structured or merely a point solution. We aim to dispel these fears by presenting an outline of a structured class-based verification framework, illustrating how cocotb could be used to develop configurable testbenches with reusable components. Read full description »

SPECIAL PRE-CONFERENCE WORKSHOP - Monday June 30th

Doulos is also hosting Essential SystemVerilog Assertions a hands-on, one-day workshop the day before the conference at Reading University. It's a great opportunity to up-skill your SVA KnowHow at a fraction of the usual cost for this training. Find full details and register this workshop »