Developing with Arm Cortex-v8-M

Standard Level - Live Instructor-Led Training

4 days (In-Person) 8 hours per day or
5 sessions (Live Online) 6 hours per session

Build practical, project-ready skills for developing and debugging firmware on Arm^®v8-M microcontrollers — including the fundamentals of TrustZone^® for Cortex^®-M.

This course introduces software development for microcontrollers based on the Armv8-M architecture. The course starts with the programmer’s model and core architectural fundamentals, then builds towards practical, tool-based development and debugging workflows. Later modules cover Armv8-M extensions with a focus on TrustZone security (TrustZone for Cortex-M).

Armv8-M is delivered across several Cortex-M families. This course is applicable to customers using, for example:

Cortex-M23 (Armv8-M Baseline)
Cortex-M33 (Armv8-M Mainline)
Cortex-M35P (Armv8-M Mainline)
Cortex-M52 / Cortex-M55 / Cortex-M85 (Armv8.1-M Mainline)

Hands-on Labs

The learning is reinforced with hands-on exercises designed to make engineers productive quickly. Labs use a practical setup:

A self-contained virtual machine environment with a pre-configured toolchain and lab materials, designed to minimise setup time and provide a consistent experience.
A TrustZone-capable Armv8-M development board is used for selected practical exercises (for example, an STM32L552-based platform or equivalent), to demonstrate secure/non-secure configuration and behaviour on real hardware.

Tooling is kept vendor-neutral and exercises use GNU-based development tools and standard embedded debugging workflows.

Who should attend?

This course is designed for:

Embedded software engineers developing bare-metal firmware or low-level drivers
Firmware engineers who need to understand and apply TrustZone for Cortex-M fundamentals (secure/non-secure partitioning)
Engineers who want to strengthen their understanding of the programmer’s model, exceptions, and debugging as applied to Armv8-M systems

Pre-requisites

A general understanding of computer architecture concepts (registers, memory, exceptions)
Basic C programming skills
Familiarity with compilation and linking concepts (object files, ELF, memory map)

Learning Outcome

By the end of the course, participants will be able to:

Explain the Armv8-M programmer’s model (registers, privilege levels, stacks, exceptions) and apply it to real debugging scenarios
Build, link, and debug firmware images using industry-standard embedded workflows
Understand memory attributes, barriers, and MPU-based memory protection concepts in Cortex-M systems
Design and implement a basic secure/non-secure split using TrustZone for Cortex-M, including toolchain support concepts (secure gateway calls, exception behaviour across security states)
Recognise where Helium-capable cores are used and what kinds of workloads benefit (high-level orientation only)

Training materials

This class is based on source training material developed by Arm themselves, augmented with supplemental content and labs developed by Doulos. Doulos is a global Arm Approved Training Partner.

Content

Arm foundations
Arm Ltd overview and processor portfolio • Architecture profiles and where Cortex-M fits • Example Arm-based system context

Cortex-M core overview (Armv8-M family)
Overview of Cortex-M23/M33/M35P and newer Armv8.1-M Cortex-M families • Architectural features and security architecture • Debug/trace concepts and system integration considerations

Programmer’s model
Data types and core registers • Privilege modes and stacks • Exception handling model

Memory model and protection
Address space concepts • Memory attributes and barriers • MPU concepts: regions and fault behaviour (e.g., MemManage faults)

Embedded software development workflow
Startup and initialization concepts • Tailoring the linker/memory map • C library considerations • Building and debugging an image

Security extensions (TrustZone for Cortex-M)
Secure/non-secure memory configuration concepts • Secure gateway calls and toolchain support • Exceptions in secure and non-secure contexts

Debug and performance
Run-control debugging concepts • Halting events and typical debug flows • Non-invasive trace concepts (overview) • Performance monitoring and profiling concepts (overview)

CMSIS ecosystem
CMSIS-Core, CMSIS-DSP, CMSIS-Driver • CMSIS-RTOS: overview only (this course is not RTOS-specific training)

Arm^®, Cortex^® and TrustZone^® are registered trademarks of Arm Holdings Plc.